x86 – architecture developments are ongoing: AMD already shifted and now Intel is shifting from using proprietary interfaces to open industry standards: For the processor interface the shift is going from the Front Side Bus (FSB) to QuickPath Interconnect (QPI) and for the Intel chipset interface: the Direct Media Interface (DMI) is shifting to PCI-express. The shift to these industrial standards opens dedicated customized system solutions by combining customer IP with powerful x86 platforms. In parallel technology developments are closing the density cap between field programmable gate arrays and application specific ICs.

Another technology trend was integrating North Bridge and South Bridge to a Platform Controller Hub (PCH) or System Controller Hub (SCH). Typically the "power sequencer functionality" is not (yet) integrated in these devices. CPLD device is a good choice to implement the power sequencer, and in parallel other relevant functionality like FWH to SPI flash conversion and VID multiplexing can be included as well. Eltan has build up quite some experience in this field.

Please have a look at our development tools section to see some examples.